From a1d4464975c3e714564fa908e21a5bbbe4a0b7c6 Mon Sep 17 00:00:00 2001
From: Astrid Smith
Date: Mon, 13 Sep 2010 22:26:14 -0700
Subject: Documentation update

---
 README.markdown | 4 ++++
 opcodes.asm     | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/README.markdown b/README.markdown
index 1ddf40f..fb95388 100644
--- a/README.markdown
+++ b/README.markdown
@@ -42,6 +42,10 @@ instruction with a fixed 42 cycle overhead:
 	  jmp      0(a3,d0)  ;14 cycles
 	  ;; overhead:        42 cycles
 
+(Using techniques borrowed from
+[Tezxas](http://tezxas.ticalc.org/technica.htm) I will be able to get
+this to 30 cycles.)
+
 From there, an instruction will take anywhere from 0 to, well, lots of
 additional cycles.  Generally, however, it will take under 50, for 92
 total.  In the worst reasonable case, a 4 cycle instruction emulated
diff --git a/opcodes.asm b/opcodes.asm
index 3239dd4..329a825 100644
--- a/opcodes.asm
+++ b/opcodes.asm
@@ -186,7 +186,7 @@ DONE	MACRO
 	ENDM
 
 	;; Timing correction for more precise emulation
-	;; 
+	;;
 	;; \1 is number of tstates the current instruction should take
 	;; \2 is number of cycles taken already
 TIME	MACRO
@@ -673,6 +673,7 @@ emu_op_36:
 emu_op_37:
 	;; SCF
 	;; Set Carry Flag
+	;; XXX flags are more complicated than this :(
 	move.b	#%00111011,flag_valid-flag_storage(a3)
 	move.b	eaf,d1
 	ori.b	#%00000001,d1
-- 
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