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| author | Duncan Smith | 2010-09-13 22:26:14 -0700 |
|---|---|---|
| committer | Duncan Smith | 2010-09-13 22:26:14 -0700 |
| commit | 9b2d156b85a3c3eadbc8c4ab4726fcb6ec44e5d0 (patch) | |
| tree | d816adf98456610fccf9c3c010937aa9151f3074 | |
| parent | 066cbff4c7666437575569edc61631060929c158 (diff) | |
Documentation update
| -rw-r--r-- | README.markdown | 4 | ||||
| -rw-r--r-- | opcodes.asm | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/README.markdown b/README.markdown index 7750ab3..95ec567 100644 --- a/README.markdown +++ b/README.markdown @@ -42,6 +42,10 @@ instruction with a fixed 42 cycle overhead: jmp 0(a3,d0) ;14 cycles ;; overhead: 42 cycles +(Using techniques borrowed from +[Tezxas](http://tezxas.ticalc.org/technica.htm) I will be able to get +this to 30 cycles.) + From there, an instruction will take anywhere from 0 to, well, lots of additional cycles. Generally, however, it will take under 50, for 92 total. In the worst reasonable case, a 4 cycle instruction emulated diff --git a/opcodes.asm b/opcodes.asm index 3239dd4..329a825 100644 --- a/opcodes.asm +++ b/opcodes.asm @@ -186,7 +186,7 @@ DONE MACRO ENDM ;; Timing correction for more precise emulation - ;; + ;; ;; \1 is number of tstates the current instruction should take ;; \2 is number of cycles taken already TIME MACRO @@ -673,6 +673,7 @@ emu_op_36: emu_op_37: ;; SCF ;; Set Carry Flag + ;; XXX flags are more complicated than this :( move.b #%00111011,flag_valid-flag_storage(a3) move.b eaf,d1 ori.b #%00000001,d1 |