diff options
| author | Astrid Smith | 2010-12-27 22:36:40 -0800 |
|---|---|---|
| committer | Astrid Smith | 2010-12-27 22:42:51 -0800 |
| commit | abad5b6d636a86e4b4ef961bca1882220677184f (patch) | |
| tree | 3e21ec23d6aa28796a4f4761c801b71e4b8a681a | |
| parent | de07c52c8de221212d40283839fd4f027d2666e6 (diff) | |
Cleaned up interrupt routine, now it works properly.
Perhaps this is slower than necessary, particularly when interrupts
are disabled.
| -rw-r--r-- | interrupts.asm.m4 | 6 | ||||
| -rw-r--r-- | main.asm | 2 | ||||
| -rw-r--r-- | opcodes.asm.m4 | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/interrupts.asm.m4 b/interrupts.asm.m4 index cf2b195..404f02f 100644 --- a/interrupts.asm.m4 +++ b/interrupts.asm.m4 @@ -42,8 +42,8 @@ int_handler: int_nevermind: rts do_interrupt: - ;; todo: make this file m4'd add.l #INT_OFFSET,a5 ; clear the interrupt flag + pea 0(a5,d0.w) ; allows us to rts properly tst.b int_enabled ; 4 cycles beq.b int_nevermind ; 8 cycles not taken @@ -52,8 +52,6 @@ do_interrupt: ;; Since this is an instruction all its own, we have D0, D1, ;; and D2 available. - pop.l a0 - ;; Interrupts are most often in mode 1, then mode 2, and ;; almost never in mode 0. move.b int_mode,d0 @@ -63,7 +61,7 @@ do_interrupt: beq int_do_mode1 cmpi.b #1,d0 beq int_do_mode0 - jmp (a0) + rts ;; This routine emulates a mode 0 interrupt. @@ -53,6 +53,8 @@ __main: bsr emu_setup lea emu_plain_op,a5 + + ;; ... aaaaand we're off! bsr emu_run bsr emu_teardown diff --git a/opcodes.asm.m4 b/opcodes.asm.m4 index 9a1598d..63ea0dc 100644 --- a/opcodes.asm.m4 +++ b/opcodes.asm.m4 @@ -100,7 +100,7 @@ _align SET 0 START MACRO ORG emu_plain_op+_align -_align SET _align+$40 +_align SET _align+$40 ; opcode routine length jmp do_interrupt ; for interrupt routines ENDM |