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| author | Astrid Smith | 2010-06-30 17:42:29 -0700 |
|---|---|---|
| committer | Astrid Smith | 2010-06-30 17:42:29 -0700 |
| commit | ee9c777d476fbdef453e5abb010cc59862044f6c (patch) | |
| tree | 51c69a6e71507c97ae1b93dd24d2df3e5e6d867e | |
| parent | bafbb9ac286125c76d893f2057cf6e94277f0dcc (diff) | |
Readme edit
| -rw-r--r-- | README.markdown | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/README.markdown b/README.markdown index 1916270..1ddf40f 100644 --- a/README.markdown +++ b/README.markdown @@ -38,13 +38,13 @@ instruction with a fixed 42 cycle overhead: emu_fetch: eor.w d0,d0 ; 4 cycles move.b (a4)+,d0 ; 8 cycles - rol.w #5,d0 ;16 cycles adjust to actual alignment + rol.w #5,d0 ;16 cycles jmp 0(a3,d0) ;14 cycles ;; overhead: 42 cycles From there, an instruction will take anywhere from 0 to, well, lots of additional cycles. Generally, however, it will take under 50, for 92 -total. In the worst reasonable case, a 4 cycle instruction emlulated +total. In the worst reasonable case, a 4 cycle instruction emulated in 92 cycles, that's a 23:1 ratio. In the best possible case, a 17-cycle instruction emulated in 42 cycles, is more nearly a 1:2 ratio. |