Registers holding emulated registers are now named.

Hopefully 'esp', 'epc', 'eaf', and friends will be less troublesome
than 'a4', 'a6', and 'd3'.

1 files changed, 416 insertions, 416 deletions

diff --git a/opcodes.asm b/opcodes.asm
index 8042296..2db3351 100644
--- a/opcodes.asm
+++ b/opcodes.asm
@@ -74,9 +74,9 @@ PUSHW	MACRO
 	;;   \1_l <- (SP)
 	;;   SP <- SP + 2
 POPW	MACRO
-	move.b	(a4)+,\1
+	move.b	(esp)+,\1
 	LOHI	\1		;slow
-	move.b	(a4)+,\1	; high byte
+	move.b	(esp)+,\1	; high byte
 	HILO	\1		;slow
 	ENDM
 
@@ -84,15 +84,15 @@ POPW	MACRO
 
 	;; Macro to read an immediate byte into \1.
 FETCHBI	MACRO			; 8 cycles, 2 bytes
-	move.b	(a6)+,\1	; 8/2
+	move.b	(epc)+,\1	; 8/2
 	ENDM
 
 	;; Macro to read an immediate word (unaligned) into \1.
 FETCHWI	MACRO			; 28 cycles, 6 bytes
 	;; See FETCHW for an explanation of this trick.
-	move.b	(a6)+,-(sp)	; 12/2
+	move.b	(epc)+,-(sp)	; 12/2
 	move.w	(sp)+,\1	;  8/2
-	move.b	(a6)+,\1	;  8/2
+	move.b	(epc)+,\1	;  8/2
 	ENDM			; 28/6
 
 	;; == Common Opcode Macros =========================================
@@ -108,7 +108,7 @@ _align	SET	_align+$20
 	;; This is run at the end of every instruction routine.
 DONE	MACRO
 	clr.w	d0		; 4 cycles / 2 bytes
-	move.b	(a6)+,d0	; 8 cycles / 2 bytes
+	move.b	(epc)+,d0	; 8 cycles / 2 bytes
 	move.b	d0,$4c00+32*(128/8)
 	rol.w	#5,d0		;16 cycles / 2 bytes
 	jmp	0(a5,d0.w)	;14 cycles / 4 bytes
@@ -135,11 +135,11 @@ HILO	MACRO			; 22 cycles, 2 bytes
 
 	;; Rearrange a register: ABCD -> ACBD.
 WORD	MACRO
-	move.l	\1,-(a7)	;12 cycles / 2 bytes
-	movep.w	0(a7),\1	;16 cycles / 4 bytes
+	move.l	\1,-(sp)	;12 cycles / 2 bytes
+	movep.w	0(sp),\1	;16 cycles / 4 bytes
 	swap	\1		; 4 cycles / 2 bytes
-	movep.w	1(a7),\1	;16 cycles / 4 bytes
-	addq	#4,a7		; 4 cycles / 2 bytes
+	movep.w	1(sp),\1	;16 cycles / 4 bytes
+	addq	#4,sp		; 4 cycles / 2 bytes
 	;; overhead:		 52 cycles /14 bytes
 	ENDM
 
@@ -197,14 +197,14 @@ emu_op_01:			; S12 T36
 	;; LD	BC,immed.w
 	;; Read a word and put it in BC
 	;; No flags
-	FETCHWI	d4
+	FETCHWI	ebc
 	DONE
 
 	START
 emu_op_02:			; S4 T14
 	;; LD	(BC),A
 	;; No flags
-	FETCHB	d4,d3
+	FETCHB	ebc,eaf
 	DONE
 
 	START
@@ -212,25 +212,25 @@ emu_op_03:			; S2 T4
 	;; INC	BC
 	;; BC <- BC+1
 	;; No flags
-	F_INC_W	d4
+	F_INC_W	ebc
 	DONE
 
 	START
 emu_op_04:
 	;; INC	B
 	;; B <- B+1
-	LOHI	d4
-	F_INC_B	d4
-	HILO	d4
+	LOHI	ebc
+	F_INC_B	ebc
+	HILO	ebc
 	DONE
 
 	START
 emu_op_05:
 	;; DEC	B
 	;; B <- B-1
-	LOHI	d4
-	F_DEC_B	d4
-	HILO	d4
+	LOHI	ebc
+	F_DEC_B	ebc
+	HILO	ebc
 	DONE
 
 	START
@@ -238,9 +238,9 @@ emu_op_06:			; S10 T26
 	;; LD	B,immed.b
 	;; Read a byte and put it in B
 	;; No flags
-	LOHI	d4
-	FETCHBI	d4
-	HILO	d4
+	LOHI	ebc
+	FETCHBI	ebc
+	HILO	ebc
 	DONE
 
 	START
@@ -249,7 +249,7 @@ emu_op_07:			; S2 T4
 	;; Rotate A left, carry bit gets top bit
 	;; Flags: H,N=0; C aff.
 	;; XXX flags
-	rol.b	#1,d3
+	rol.b	#1,eaf
 	DONE
 
 	START
@@ -257,7 +257,7 @@ emu_op_08:			; S2 T4
 	;; EX	AF,AF'
 	;; No flags
 	;; XXX AF
-	swap	d3
+	swap	eaf
 	DONE
 
 	START
@@ -265,7 +265,7 @@ emu_op_09:
 	;; ADD	HL,BC
 	;; HL <- HL+BC
 	;; Flags: H, C aff.; N=0
-	F_ADD_W	d4,d6
+	F_ADD_W	ebc,ehl
 	DONE
 
 	START
@@ -273,7 +273,7 @@ emu_op_0a:			; S4 T14
 	;; LD	A,(BC)
 	;; A <- (BC)
 	;; No flags
-	FETCHB	d4,d3
+	FETCHB	ebc,eaf
 	DONE
 
 	START
@@ -281,7 +281,7 @@ emu_op_0b:			; S2 T4
 	;; DEC	BC
 	;; BC <- BC-1
 	;; No flags
-	F_DEC_W	d4
+	F_DEC_W	ebc
 	DONE
 
 	START
@@ -289,7 +289,7 @@ emu_op_0c:
 	;; INC	C
 	;; C <- C+1
 	;; Flags: S,Z,H aff.; P=overflow, N=0
-	F_INC_B	d4
+	F_INC_B	ebc
 	DONE
 
 	START
@@ -297,14 +297,14 @@ emu_op_0d:
 	;; DEC	C
 	;; C <- C-1
 	;; Flags: S,Z,H aff., P=overflow, N=1
-	F_DEC_B	d4
+	F_DEC_B	ebc
 	DONE
 
 	START
 emu_op_0e:			; S6 T18
 	;; LD	C,immed.b
 	;; No flags
-	FETCHBI	d4
+	FETCHBI	ebc
 	DONE
 
 	START
@@ -313,7 +313,7 @@ emu_op_0f:
 	;; Rotate A right, carry bit gets top bit
 	;; Flags: H,N=0; C aff.
 	;; XXX FLAGS
-	ror.b	#1,d3
+	ror.b	#1,eaf
 	DONE
 
 	START
@@ -323,65 +323,65 @@ emu_op_10:			; S32
 	;;  and branch by immed.b
 	;;  if B not zero
 	;; No flags
-	LOHI	d4
-	subq.b	#1,d4
+	LOHI	ebc
+	subq.b	#1,ebc
 	beq.s	end_10	; slooooow
 	FETCHBI	d1
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	add.w	d1,d0		; ??? Can I avoid underef/deref cycle?
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 end_10:
-	HILO	d4
+	HILO	ebc
 	DONE
 
 	START
 emu_op_11:			; S
 	;; LD	DE,immed.w
 	;; No flags
-	FETCHWI	d5
+	FETCHWI	ede
 	DONE
 
 	START
 emu_op_12:
 	;; LD	(DE),A
 	;; No flags
-	FETCHB	d5,d3
+	FETCHB	ede,eaf
 	DONE
 
 	START
 emu_op_13:
 	;; INC	DE
 	;; No flags
-	F_INC_W	d5
+	F_INC_W	ede
 	DONE
 
 	START
 emu_op_14:
 	;; INC	D
 	;; Flags: S,Z,H aff.; P=overflow, N=0
-	LOHI	d5
-	F_INC_B	d5
-	HILO	d5
+	LOHI	ede
+	F_INC_B	ede
+	HILO	ede
 	DONE
 
 	START
 emu_op_15:
 	;; DEC	D
 	;; Flags: S,Z,H aff.; P=overflow, N=1
-	LOHI	d5
-	F_DEC_B	d5
-	HILO	d5
+	LOHI	ede
+	F_DEC_B	ede
+	HILO	ede
 	DONE
 
 	START
 emu_op_16:
 	;; LD D,immed.b
 	;; No flags
-	LOHI	d5
-	FETCHBI	d5
-	HILO	d5
+	LOHI	ede
+	FETCHBI	ede
+	HILO	ede
 	DONE
 
 	START
@@ -389,7 +389,7 @@ emu_op_17:
 	;; RLA
 	;; Flags: P,N=0; C aff.
 	;; XXX flags
-	roxl.b	#1,d3
+	roxl.b	#1,eaf
 	DONE
 
 	START
@@ -398,11 +398,11 @@ emu_op_18:
 	;; Branch relative by a signed immediate byte
 	;; No flags
 	FETCHBI	d1
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	add.w	d1,d0		; ??? Can I avoid underef/deref cycle?
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -410,7 +410,7 @@ emu_op_19:
 	;; ADD	HL,DE
 	;; HL <- HL+DE
 	;; Flags: H,C aff,; N=0
-	F_ADD_W	d5,d6
+	F_ADD_W	ede,ehl
 	DONE
 
 	START
@@ -418,35 +418,35 @@ emu_op_1a:
 	;; LD	A,(DE)
 	;; A <- (DE)
 	;; No flags
-	FETCHB	d5,d3
+	FETCHB	ede,eaf
 	DONE
 
 	START
 emu_op_1b:
 	;; DEC	DE
 	;; No flags
-	subq.w	#1,d5
+	subq.w	#1,ede
 	DONE
 
 	START
 emu_op_1c:
 	;; INC	E
 	;; Flags: S,Z,H aff.; P=overflow; N=0
-	F_INC_B	d5
+	F_INC_B	ede
 	DONE
 
 	START
 emu_op_1d:
 	;; DEC	E
 	;; Flags: S,Z,H aff.; P=overflow, N=1
-	F_DEC_B	d5
+	F_DEC_B	ede
 	DONE
 
 	START
 emu_op_1e:
 	;; LD	E,immed.b
 	;; No flags
-	FETCHBI	d5
+	FETCHBI	ede
 	DONE
 
 	START
@@ -454,7 +454,7 @@ emu_op_1f:
 	;; RRA
 	;; Flags: H,N=0; C aff.
 	;; XXX FLAGS
-	roxr.b	#1,d3
+	roxr.b	#1,eaf
 	DONE
 
 	START
@@ -466,7 +466,7 @@ emu_op_20:
 	;; No flags
 	beq.s	end_20
 	FETCHBI	d1
-	add.w	d1,a6		; XXX deref?
+	add.w	d1,epc		; XXX deref?
 end_20:
 	DONE
 
@@ -474,7 +474,7 @@ end_20:
 emu_op_21:
 	;; LD	HL,immed.w
 	;; No flags
-	FETCHWI	d6
+	FETCHWI	ehl
 	DONE
 
 	START
@@ -483,41 +483,41 @@ emu_op_22:
 	;; (address) <- HL
 	;; No flags
 	FETCHWI	d1
-	PUTW	d6,d1
+	PUTW	ehl,d1
 	DONE
 
 	START
 emu_op_23:
 	;; INC	HL
 	;; No flags
-	addq.w	#1,d6
+	addq.w	#1,ehl
 	DONE
 
 	START
 emu_op_24:
 	;; INC	H
 	;; Flags: S,Z,H aff.; P=overflow, N=0
-	LOHI	d6
-	F_INC_B	d6
-	HILO	d6
+	LOHI	ehl
+	F_INC_B	ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_25:
 	;; DEC	H
 	;; Flags: S,Z,H aff.; P=overflow, N=1
-	LOHI	d6
-	F_DEC_B	d6
-	HILO	d6
+	LOHI	ehl
+	F_DEC_B	ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_26:
 	;; LD	H,immed.b
 	;; No flags
-	LOHI	d6
-	FETCHBI	d6
-	HILO	d6
+	LOHI	ehl
+	FETCHBI	ehl
+	HILO	ehl
 	DONE
 
 	START
@@ -528,7 +528,7 @@ emu_op_27:
 	;; Flags: oh lord they're fucked up
 	;; XXX DO THIS
 
-	F_PAR	d3
+	F_PAR	eaf
 	DONE
 
 	START
@@ -546,7 +546,7 @@ emu_op_28:
 emu_op_29:
 	;; ADD	HL,HL
 	;; No flags
-	F_ADD_W	d6,d6
+	F_ADD_W	ehl,ehl
 	DONE
 
 	START
@@ -554,31 +554,31 @@ emu_op_2a:
 	;; LD	HL,(immed.w)
 	;; address is absolute
 	FETCHWI	d1
-	FETCHW	d1,d6
+	FETCHW	d1,ehl
 	DONE
 
 	START
 emu_op_2b:
 	;; DEC	HL
-	F_DEC_W	d6
+	F_DEC_W	ehl
 	DONE
 
 	START
 emu_op_2c:
 	;; INC	L
-	F_INC_B	d6
+	F_INC_B	ehl
 	DONE
 
 	START
 emu_op_2d:
 	;; DEC	L
-	F_DEC_B	d6
+	F_DEC_B	ehl
 	DONE
 
 	START
 emu_op_2e:
 	;; LD	L,immed.b
-	FETCHBI	d6
+	FETCHBI	ehl
 	DONE
 
 	START
@@ -586,7 +586,7 @@ emu_op_2f:
 	;; CPL
 	;; A <- NOT A
 	;; XXX flags
-	not.b	d3
+	not.b	eaf
 	DONE
 
 	START
@@ -603,7 +603,7 @@ emu_op_31:
 	;; LD	SP,immed.w
 	FETCHWI	d1
 	bsr	deref
-	movea.l	a0,a4
+	movea.l	a0,esp
 	DONE
 
 	START
@@ -611,7 +611,7 @@ emu_op_32:
 	;; LD	(immed.w),A
 	;; store indirect
 	FETCHWI	d1
-	PUTB	d3,d1
+	PUTB	eaf,d1
 	DONE
 
 	START
@@ -621,7 +621,7 @@ emu_op_33:
 	;;
 	;; FYI:  Do not have to deref because this will never cross a
 	;; page boundary.  So sayeth BrandonW.
-	addq.w	#1,a4
+	addq.w	#1,esp
 	DONE
 
 	START
@@ -629,9 +629,9 @@ emu_op_34:
 	;; INC	(HL)
 	;; Increment byte
 	;; SPEED can be made faster
-	FETCHB	d6,d1
+	FETCHB	ehl,d1
 	F_INC_B	d1
-	PUTB	d1,d6
+	PUTB	d1,ehl
 	DONE
 
 	START
@@ -639,16 +639,16 @@ emu_op_35:
 	;; DEC	(HL)
 	;; Decrement byte
 	;; SPEED can be made faster
-	FETCHB	d6,d1
+	FETCHB	ehl,d1
 	F_DEC_B	d1
-	PUTB	d1,d6
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_36:
 	;; LD	(HL),immed.b
 	FETCHBI	d1
-	PUTB	d6,d1
+	PUTB	ehl,d1
 	DONE
 
 	START
@@ -656,7 +656,7 @@ emu_op_37:
 	;; SCF
 	;; Set Carry Flag
 	move.b	#%00111011,flag_valid-flag_storage(a3)
-	move.b	d3,d1
+	move.b	eaf,d1
 	ori.b	#%00000001,d1
 	andi.b	#%00101001,d1
 	or.b	d1,flag_byte-flag_storage(a3)
@@ -675,43 +675,43 @@ emu_op_38:
 emu_op_39:
 	;; ADD	HL,SP
 	;; HL <- HL+SP
-	move	a4,a0
+	move	esp,a0
 	bsr	underef
-	F_ADD_W	d6,d0		; ??? Can I avoid underef/deref cycle?
+	F_ADD_W	ehl,d0		; ??? Can I avoid underef/deref cycle?
 	bsr	deref
-	move.l	a0,a4
+	move.l	a0,esp
 	DONE
 
 	START
 emu_op_3a:
 	;; LD	A,(immed.w)
 	FETCHWI	d1
-	FETCHB	d1,d3
+	FETCHB	d1,eaf
 	DONE
 
 	START
 emu_op_3b:
 	;; DEC	SP
 	;; No flags
-	subq.l	#1,a4
+	subq.l	#1,esp
 	DONE
 
 	START
 emu_op_3c:
 	;; INC	A
-	F_INC_B	d3
+	F_INC_B	eaf
 	DONE
 
 	START
 emu_op_3d:
 	;; DEC	A
-	F_DEC_B	d3
+	F_DEC_B	eaf
 	DONE
 
 	START
 emu_op_3e:
 	;; LD	A,immed.b
-	FETCHBI	d3
+	FETCHBI	eaf
 	DONE
 
 	START
@@ -727,19 +727,19 @@ emu_op_3f:
 emu_op_40:
 	;; LD	B,B
 	;; SPEED
-	LOHI	d4
-	move.b	d4,d4
-	HILO	d4
+	LOHI	ebc
+	move.b	ebc,ebc
+	HILO	ebc
 	DONE
 
 	START
 emu_op_41:
 	;; LD	B,C
 	;; SPEED
-	move.b	d4,d1
-	LOHI	d4
-	move.b	d1,d4
-	HILO	d4
+	move.b	ebc,d1
+	LOHI	ebc
+	move.b	d1,ebc
+	HILO	ebc
 	DONE
 
 	START
@@ -747,66 +747,66 @@ emu_op_42:
 	;; LD	B,D
 	;; B <- D
 	;; SPEED
-	LOHI	d4
-	LOHI	d5
-	move.b	d5,d4
-	HILO	d4
-	HILO	d5
+	LOHI	ebc
+	LOHI	ede
+	move.b	ede,ebc
+	HILO	ebc
+	HILO	ede
 	DONE
 
 	START
 emu_op_43:
 	;; LD	B,E
 	;; B <- E
-	LOHI	d4
-	move.b	d4,d5		; 4
-	HILO	d4
+	LOHI	ebc
+	move.b	ebc,ede		; 4
+	HILO	ebc
 	DONE
 
 	START
 emu_op_44:
 	;; LD	B,H
 	;; B <- H
-	LOHI	d4
-	LOHI	d6
-	move.b	d6,d4
-	HILO	d4
-	HILO	d6
+	LOHI	ebc
+	LOHI	ehl
+	move.b	ehl,ebc
+	HILO	ebc
+	HILO	ehl
 	DONE
 
 	START
 emu_op_45:
 	;; LD	B,L
 	;; B <- L
-	LOHI	d4
-	move.b	d6,d4
-	HILO	d4
+	LOHI	ebc
+	move.b	ehl,ebc
+	HILO	ebc
 	DONE
 
 	START
 emu_op_46:
 	;; LD	B,(HL)
 	;; B <- (HL)
-	LOHI	d4
-	FETCHB	d6,d4
-	HILO	d4
+	LOHI	ebc
+	FETCHB	ehl,ebc
+	HILO	ebc
 	DONE
 
 	START
 emu_op_47:
 	;; LD	B,A
 	;; B <- A
-	LOHI	d4
-	move.b	d3,d4
-	HILO	d4
+	LOHI	ebc
+	move.b	eaf,ebc
+	HILO	ebc
 	DONE
 
 	START
 emu_op_48:
 	;; LD	C,B
 	;; C <- B
-	move.w	d4,-(sp)
-	move.b	(sp),d4
+	move.w	ebc,-(sp)
+	move.b	(sp),ebc
 	;; XXX emfasten?
 	addq.l #2,sp
 	DONE
@@ -819,8 +819,8 @@ emu_op_49:
 	START
 emu_op_4a:
 	;; LD	C,D
-	move.w	d5,-(sp)
-	move.b	(sp),d4
+	move.w	ede,-(sp)
+	move.b	(sp),ebc
 	;; XXX emfasten?
 	addq.l #2,sp
 	DONE
@@ -828,58 +828,58 @@ emu_op_4a:
 	START
 emu_op_4b:
 	;; LD	C,E
-	move.b	d4,d5
+	move.b	ebc,ede
 	DONE
 
 	START
 emu_op_4c:
 	;; LD	C,H
-	LOHI	d6
-	move.b	d4,d6
-	HILO	d6
+	LOHI	ehl
+	move.b	ebc,ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_4d:
 	;; LD	C,L
-	move.b	d4,d6
+	move.b	ebc,ehl
 	DONE
 
 	START
 emu_op_4e:
 	;; LD	C,(HL)
 	;; C <- (HL)
-	FETCHB	d6,d4
+	FETCHB	ehl,ebc
 	DONE
 
 	START
 emu_op_4f:
 	;; LD	C,A
-	move.b	d3,d4
+	move.b	eaf,ebc
 	DONE
 
 	START
 emu_op_50:
 ; faster (slightly bigger) if we abuse sp again, something along the lines of (UNTESTED)
-; move.w d4,-(sp)   ; 8, 2
-; move.w d5,-(sp)   ; 8, 2
+; move.w ebc,-(sp)   ; 8, 2
+; move.w ede,-(sp)   ; 8, 2
 ; move.b 2(sp),(sp) ; 16, 4
-; move.w (sp)+,d5   ; 8, 2
+; move.w (sp)+,ede   ; 8, 2
 ; addq.l #2,sp      ; 8, 2
 	;; LD	D,B
-	LOHI	d4
-	LOHI	d5
-	move.b	d4,d5
-	HILO	d4
-	HILO	d5
+	LOHI	ebc
+	LOHI	ede
+	move.b	ebc,ede
+	HILO	ebc
+	HILO	ede
 	DONE
 
 	START
 emu_op_51:
 	;; LD	D,C
-	LOHI	d5
-	move.b	d4,d5
-	HILO	d5
+	LOHI	ede
+	move.b	ebc,ede
+	HILO	ede
 	DONE
 
 	START
@@ -890,69 +890,69 @@ emu_op_52:
 	START
 emu_op_53:
 	;; LD	D,E
-	andi.w	#$00ff,d5
-	move.b	d5,d1
+	andi.w	#$00ff,ede
+	move.b	ede,d1
 	lsl	#8,d1
-	or.w	d1,d5
+	or.w	d1,ede
 	DONE
 
 	START
 emu_op_54:
 	;; LD	D,H
-	LOHI	d5		; 4
-	LOHI	d6		; 4
-	move.b	d6,d5		; 4
-	HILO	d5		; 4
-	HILO	d6		; 4
+	LOHI	ede		; 4
+	LOHI	ehl		; 4
+	move.b	ehl,ede		; 4
+	HILO	ede		; 4
+	HILO	ehl		; 4
 	DONE
 				;20 cycles
 
 	START
 emu_op_55:
 	;; LD	D,L
-	LOHI	d5
-	move.b	d6,d5
-	HILO	d5
+	LOHI	ede
+	move.b	ehl,ede
+	HILO	ede
 	DONE
 
 	START
 emu_op_56:
 	;; LD	D,(HL)
 	;; D <- (HL)
-	LOHI	d5
-	FETCHB	d6,d5
-	HILO	d5
+	LOHI	ede
+	FETCHB	ehl,ede
+	HILO	ede
 	DONE
 
 	START
 emu_op_57:
 	;; LD	D,A
-	LOHI	d5
-	move.b	d3,d5
-	HILO	d5
+	LOHI	ede
+	move.b	eaf,ede
+	HILO	ede
 	DONE
 
 	START
 emu_op_58:
 	;; LD	E,B
-	LOHI	d4
-	move.b	d4,d5
-	HILO	d4
+	LOHI	ebc
+	move.b	ebc,ede
+	HILO	ebc
 	DONE
 
 	START
 emu_op_59:
 	;; LD	E,C
-	move.b	d4,d5
+	move.b	ebc,ede
 	DONE
 
 	START
 emu_op_5a:
 	;; LD	E,D
-	andi.w	#$ff00,d5	; 8/4
-	move.b	d5,d1		; 4/2
+	andi.w	#$ff00,ede	; 8/4
+	move.b	ede,d1		; 4/2
 	lsr.w	#8,d1		;22/2
-	or.w	d1,d5		; 4/2
+	or.w	d1,ede		; 4/2
 	DONE
 				;38/2
 
@@ -964,63 +964,63 @@ emu_op_5b:
 	START
 emu_op_5c:
 	;; LD	E,H
-	LOHI	d6
-	move.b	d5,d6
-	HILO	d6
+	LOHI	ehl
+	move.b	ede,ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_5d:
 	;; LD	E,L
-	move.b	d5,d6
+	move.b	ede,ehl
 	DONE
 
 	START
 emu_op_5e:
 	;; LD	E,(HL)
-	FETCHB	d6,d1
+	FETCHB	ehl,d1
 	DONE
 
 	START
 emu_op_5f:
 	;; LD	E,A
-	move.b	d5,d3
+	move.b	ede,eaf
 	DONE
 
 	START
 emu_op_60:
 	;; LD	H,B
-	LOHI	d4
-	LOHI	d6
-	move.b	d6,d4
-	HILO	d4
-	HILO	d6
+	LOHI	ebc
+	LOHI	ehl
+	move.b	ehl,ebc
+	HILO	ebc
+	HILO	ehl
 	DONE
 
 	START
 emu_op_61:
 	;; LD	H,C
-	LOHI	d6
-	move.b	d4,d6
-	HILO	d6
+	LOHI	ehl
+	move.b	ebc,ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_62:
 	;; LD	H,D
-	LOHI	d5
-	LOHI	d6
-	move.b	d5,d6
-	HILO	d5
-	HILO	d6
+	LOHI	ede
+	LOHI	ehl
+	move.b	ede,ehl
+	HILO	ede
+	HILO	ehl
 	DONE
 
 	START
 emu_op_63:
 	;; LD	H,E
-	LOHI	d6
-	move.b	d5,d6
-	HILO	d6
+	LOHI	ehl
+	move.b	ede,ehl
+	HILO	ehl
 	DONE
 
 	START
@@ -1032,64 +1032,64 @@ emu_op_64:
 emu_op_65:
 	;; LD	H,L
 	;; H <- L
-	move.b	d6,d1
-	LOHI	d6
-	move.b	d1,d6
-	HILO	d6
+	move.b	ehl,d1
+	LOHI	ehl
+	move.b	d1,ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_66:
 	;; LD	H,(HL)
-	FETCHB	d6,d1
-	LOHI	d6
-	move.b	d1,d6
-	HILO	d6
+	FETCHB	ehl,d1
+	LOHI	ehl
+	move.b	d1,ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_67:
 	;; LD	H,A
-	LOHI	d6
-	move.b	d3,d6
-	HILO	d6
+	LOHI	ehl
+	move.b	eaf,ehl
+	HILO	ehl
 	DONE
 
 	START
 emu_op_68:
 	;; LD	L,B
-	LOHI	d4
-	move.b	d4,d6
-	HILO	d4
+	LOHI	ebc
+	move.b	ebc,ehl
+	HILO	ebc
 	DONE
 
 	START
 emu_op_69:
 	;; LD	L,C
-	move.b	d4,d6
+	move.b	ebc,ehl
 	DONE
 
 	START
 emu_op_6a:
 	;; LD	L,D
-	LOHI	d5
-	move.b	d5,d6
-	HILO	d5
+	LOHI	ede
+	move.b	ede,ehl
+	HILO	ede
 	DONE
 
 	START
 emu_op_6b:
 	;; LD	L,E
-	move.b	d5,d6
+	move.b	ede,ehl
 	DONE
 
 	START
 emu_op_6c:
 	;; LD	L,H
-	LOHI	d6
-	move.b	d6,d1
-	HILO	d6
-	move.b	d1,d6
+	LOHI	ehl
+	move.b	ehl,d1
+	HILO	ehl
+	move.b	d1,ehl
 	DONE
 
 	START
@@ -1101,56 +1101,56 @@ emu_op_6d:
 emu_op_6e:
 	;; LD	L,(HL)
 	;; L <- (HL)
-	FETCHB	d6,d6
+	FETCHB	ehl,ehl
 	DONE
 
 	START
 emu_op_6f:
 	;; LD	L,A
-	move.b	d3,d6
+	move.b	eaf,ehl
 	DONE
 
 	START
 emu_op_70:
 	;; LD	(HL),B
-	LOHI	d4
-	PUTB	d6,d4
-	HILO	d4
+	LOHI	ebc
+	PUTB	ehl,ebc
+	HILO	ebc
 	DONE
 
 	START
 emu_op_71:
 	;; LD	(HL),C
-	PUTB	d6,d4
+	PUTB	ehl,ebc
 	DONE
 
 	START
 emu_op_72:
 	;; LD	(HL),D
-	LOHI	d5
-	PUTB	d6,d5
-	HILO	d5
+	LOHI	ede
+	PUTB	ehl,ede
+	HILO	ede
 	DONE
 
 	START
 emu_op_73:
 	;; LD	(HL),E
-	PUTB	d6,d5
+	PUTB	ehl,ede
 	DONE
 
 	START
 emu_op_74:
 	;; LD	(HL),H
-	move.w	d6,d1
+	move.w	ehl,d1
 	HILO	d1
-	PUTB	d1,d6
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_75:
 	;; LD	(HL),L
-	move.b	d6,d1
-	PUTB	d1,d6
+	move.b	ehl,d1
+	PUTB	d1,ehl
 	DONE
 
 	START
@@ -1162,56 +1162,56 @@ emu_op_76:
 	START
 emu_op_77:
 	;; LD	(HL),A
-	PUTB	d3,d6
+	PUTB	eaf,ehl
 	DONE
 
 	START
 emu_op_78:
 	;; LD	A,B
-	move.w	d4,d1
+	move.w	ebc,d1
 	LOHI	d1
-	move.b	d1,d3
+	move.b	d1,eaf
 	DONE
 
 	START
 emu_op_79:
 	;; LD	A,C
-	move.b	d4,d3
+	move.b	ebc,eaf
 	DONE
 
 	START
 emu_op_7a:
 	;; LD	A,D
-	move.w	d5,d1
+	move.w	ede,d1
 	LOHI	d1
-	move.b	d1,d3
+	move.b	d1,eaf
 	DONE
 
 	START
 emu_op_7b:
 	;; LD	A,E
-	move.b	d5,d3
+	move.b	ede,eaf
 	DONE
 
 	START
 emu_op_7c:
 	;; LD	A,H
-	move.w	d6,d1
+	move.w	ehl,d1
 	LOHI	d1
-	move.b	d1,d3
+	move.b	d1,eaf
 	DONE
 
 	START
 emu_op_7d:
 	;; LD	A,L
-	move.b	d6,d3
+	move.b	ehl,eaf
 	DONE
 
 	START
 emu_op_7e:
 	;; LD	A,(HL)
 	;; A <- (HL)
-	FETCHB	d6,d3
+	FETCHB	ehl,eaf
 	DONE
 
 	START
@@ -1232,57 +1232,57 @@ F_ADD_B	MACRO			; 14 bytes?
 	START
 emu_op_80:
 	;; ADD	A,B
-	LOHI	d4
-	F_ADD_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_ADD_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_81:
 	;; ADD	A,C
-	F_ADD_B	d4,d3
+	F_ADD_B	ebc,eaf
 	DONE
 
 	START
 emu_op_82:
 	;; ADD	A,D
-	LOHI	d5
-	F_ADD_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_ADD_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_83:
 	;; ADD	A,E
-	F_ADD_B	d5,d3
+	F_ADD_B	ede,eaf
 	DONE
 
 	START
 emu_op_84:
 	;; ADD	A,H
-	LOHI	d6
-	F_ADD_B	d6,d3
-	HILO	d6
+	LOHI	ehl
+	F_ADD_B	ehl,eaf
+	HILO	ehl
 	DONE
 
 	START
 emu_op_85:
 	;; ADD	A,L
-	F_ADD_B	d6,d3
+	F_ADD_B	ehl,eaf
 	DONE
 
 	START
 emu_op_86:
 	;; ADD	A,(HL)
-	FETCHB	d6,d1
-	F_ADD_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_ADD_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_87:
 	;; ADD	A,A
-	F_ADD_B	d3,d3
+	F_ADD_B	eaf,eaf
 	DONE
 
 
@@ -1299,59 +1299,59 @@ F_ADC_B	MACRO			; S34
 emu_op_88:
 	;; ADC	A,B
 	;; A <- A + B + (carry)
-	LOHI	d4
-	F_ADC_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_ADC_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_89:
 	;; ADC	A,C
 	;; A <- A + C + (carry)
-	F_ADC_B	d4,d3
+	F_ADC_B	ebc,eaf
 	DONE
 
 	START
 emu_op_8a:
 	;; ADC	A,D
-	LOHI	d5
-	F_ADC_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_ADC_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_8b:
 	;; ADC	A,E
 	;; A <- A + E + carry
-	F_ADC_B	d5,d3
+	F_ADC_B	ede,eaf
 	DONE
 
 	START
 emu_op_8c:
 	;; ADC	A,H
-	LOHI	d3
-	F_ADC_B	d6,d3
-	HILO	d3
+	LOHI	eaf
+	F_ADC_B	ehl,eaf
+	HILO	eaf
 	DONE
 
 	START
 emu_op_8d:
 	;; ADC	A,L
-	F_ADC_B	d6,d3
+	F_ADC_B	ehl,eaf
 	DONE
 
 	START
 emu_op_8e:
 	;; ADC	A,(HL)
-	FETCHB	d6,d1
-	F_ADC_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_ADC_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_8f:
 	;; ADC	A,A
-	F_ADC_B	d3,d3
+	F_ADC_B	eaf,eaf
 	DONE
 
 
@@ -1369,56 +1369,56 @@ F_SUB_B	MACRO
 	START
 emu_op_90:
 	;; SUB	A,B
-	LOHI	d4
-	F_SUB_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_SUB_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_91:
 	;; SUB	A,C
-	F_SUB_B	d4,d3
+	F_SUB_B	ebc,eaf
 	DONE
 
 	START
 emu_op_92:
 	;; SUB	A,D
-	LOHI	d5
-	F_SUB_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_SUB_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_93:
 	;; SUB	A,E
-	F_SUB_B	d5,d3
+	F_SUB_B	ede,eaf
 	DONE
 
 	START
 emu_op_94:
 	;; SUB	A,H
-	LOHI	d6
-	F_SUB_B	d6,d3
-	HILO	d6
+	LOHI	ehl
+	F_SUB_B	ehl,eaf
+	HILO	ehl
 	DONE
 
 	START
 emu_op_95:
 	;; SUB	A,L
-	F_SUB_B	d6,d3
+	F_SUB_B	ehl,eaf
 
 	START
 emu_op_96:
 	;; SUB	A,(HL)
-	FETCHB	d6,d1
-	F_SUB_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_SUB_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_97:
 	;; SUB	A,A
-	F_SUB_B	d3,d3
+	F_SUB_B	eaf,eaf
 	DONE
 
 
@@ -1435,57 +1435,57 @@ F_SBC_B	MACRO
 	START
 emu_op_98:
 	;; SBC	A,B
-	LOHI	d4
-	F_SBC_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_SBC_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_99:
 	;; SBC	A,C
-	F_SBC_B	d4,d3
+	F_SBC_B	ebc,eaf
 	DONE
 
 	START
 emu_op_9a:
 	;; SBC	A,D
-	LOHI	d5
-	F_SBC_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_SBC_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_9b:
 	;; SBC	A,E
-	F_SBC_B	d5,d3
+	F_SBC_B	ede,eaf
 	DONE
 
 	START
 emu_op_9c:
 	;; SBC	A,H
-	LOHI	d6
-	F_SBC_B	d6,d3
-	HILO	d6
+	LOHI	ehl
+	F_SBC_B	ehl,eaf
+	HILO	ehl
 	DONE
 
 	START
 emu_op_9d:
 	;; SBC	A,L
-	F_SBC_B	d6,d3
+	F_SBC_B	ehl,eaf
 	DONE
 
 	START
 emu_op_9e:
 	;; SBC	A,(HL)
-	FETCHB	d6,d1
-	F_SBC_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_SBC_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_9f:
 	;; SBC	A,A
-	F_SBC_B	d3,d3
+	F_SBC_B	eaf,eaf
 	DONE
 
 
@@ -1502,57 +1502,57 @@ F_AND_B	MACRO
 	START
 emu_op_a0:
 	;; AND	B
-	LOHI	d4
-	F_AND_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_AND_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_a1:
 	;; AND	C
-	F_AND_B	d4,d3
+	F_AND_B	ebc,eaf
 
 	START
 emu_op_a2:
 	;; AND	D
-	LOHI	d5
-	F_AND_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_AND_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_a3:
 	;; AND	E
-	F_AND_B	d5,d3
+	F_AND_B	ede,eaf
 	DONE
 
 	START
 emu_op_a4:
 	;; AND	H
-	LOHI	d6
-	F_AND_B	d6,d3
-	HILO	d6
+	LOHI	ehl
+	F_AND_B	ehl,eaf
+	HILO	ehl
 	DONE
 
 	START
 emu_op_a5:
 	;; AND	L
-	F_AND_B	d6,d3
+	F_AND_B	ehl,eaf
 	DONE
 
 	START
 emu_op_a6:
 	;; AND	(HL)
-	FETCHB	d6,d1
-	F_AND_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_AND_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_a7:
 	;; AND	A
 	;; SPEED ... It's probably not necessary to run this faster.
-	F_AND_B	d3,d3
+	F_AND_B	eaf,eaf
 	DONE
 
 
@@ -1569,57 +1569,57 @@ F_XOR_B	MACRO
 	START
 emu_op_a8:
 	;; XOR	B
-	LOHI	d4
-	F_XOR_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_XOR_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_a9:
 	;; XOR	C
-	F_XOR_B	d4,d3
+	F_XOR_B	ebc,eaf
 	DONE
 
 	START
 emu_op_aa:
 	;; XOR	D
-	LOHI	d5
-	F_XOR_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_XOR_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_ab:
 	;; XOR	E
-	F_XOR_B	d5,d3
+	F_XOR_B	ede,eaf
 	DONE
 
 	START
 emu_op_ac:
 	;; XOR	H
-	LOHI	d6
-	F_XOR_B	d6,d3
-	HILO	d6
+	LOHI	ehl
+	F_XOR_B	ehl,eaf
+	HILO	ehl
 	DONE
 
 	START
 emu_op_ad:
 	;; XOR	L
-	F_XOR_B	d6,d3
+	F_XOR_B	ehl,eaf
 	DONE
 
 	START
 emu_op_ae:
 	;; XOR	(HL)
-	FETCHB	d6,d1
-	F_XOR_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_XOR_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_af:
 	;; XOR	A
-	F_XOR_B	d3,d3
+	F_XOR_B	eaf,eaf
 	;; XXX
 	DONE
 
@@ -1637,57 +1637,57 @@ F_OR_B	MACRO
 	START
 emu_op_b0:
 	;; OR	B
-	LOHI	d4
-	F_OR_B	d4,d3
-	HILO	d4
+	LOHI	ebc
+	F_OR_B	ebc,eaf
+	HILO	ebc
 	DONE
 
 	START
 emu_op_b1:
 	;; OR	C
-	F_OR_B	d4,d3
+	F_OR_B	ebc,eaf
 	DONE
 
 	START
 emu_op_b2:
 	;; OR	D
-	LOHI	d5
-	F_OR_B	d5,d3
-	HILO	d5
+	LOHI	ede
+	F_OR_B	ede,eaf
+	HILO	ede
 	DONE
 
 	START
 emu_op_b3:
 	;; OR	E
-	F_OR_B	d5,d3
+	F_OR_B	ede,eaf
 	DONE
 
 	START
 emu_op_b4:
 	;; OR	H
-	LOHI	d6
-	F_OR_B	d6,d3
-	HILO	d6
+	LOHI	ehl
+	F_OR_B	ehl,eaf
+	HILO	ehl
 	DONE
 
 	START
 emu_op_b5:
 	;; OR	L
-	F_OR_B	d6,d3
+	F_OR_B	ehl,eaf
 	DONE
 
 	START
 emu_op_b6:
 	;; OR	(HL)
-	FETCHB	d6,d1
-	F_OR_B	d1,d3
-	PUTB	d1,d6
+	FETCHB	ehl,d1
+	F_OR_B	d1,eaf
+	PUTB	d1,ehl
 	DONE
 
 	START
 emu_op_b7:
 	;; OR	A
-	F_OR_B	d3,d3
+	F_OR_B	eaf,eaf
 	DONE
 
 
@@ -1706,57 +1706,57 @@ F_CP_B	MACRO
 	START
 emu_op_b8:
 	;; CP	B
-	move.b	d4,d1
+	move.b	ebc,d1
 	LOHI	d1
-	F_CP_B	d1,d3
+	F_CP_B	d1,eaf
 	DONE
 
 	START
 emu_op_b9:
 	;; CP	C
-	F_CP_B	d4,d3
+	F_CP_B	ebc,eaf
 	DONE
 
 	START
 emu_op_ba:
 	;; CP	D
-	move.b	d5,d1
+	move.b	ede,d1
 	LOHI	d1
-	F_CP_B	d1,d3
+	F_CP_B	d1,eaf
 	DONE
 
 	START
 emu_op_bb:
 	;; CP	E
-	F_CP_B	d5,d3
+	F_CP_B	ede,eaf
 	DONE
 
 	START
 emu_op_bc:
 	;; CP	H
-	move.b	d6,d1
+	move.b	ehl,d1
 	LOHI	d1
-	F_CP_B	d1,d3
+	F_CP_B	d1,eaf
 	DONE
 
 	START
 emu_op_bd:
 	;; CP	L
-	F_CP_B	d6,d3
+	F_CP_B	ehl,eaf
 	DONE
 
 	START
 emu_op_be:
 	;; CP	(HL)
-	FETCHB	d6,d1
-	F_CP_B	d1,d3		; if F_CP_B uses d1, watch out for this
+	FETCHB	ehl,d1
+	F_CP_B	d1,eaf		; if F_CP_B uses d1, watch out for this
 	;; no result to store
 	DONE
 
 	START
 emu_op_bf:
 	;; CP	A
-	F_CP_B	d3,d3
+	F_CP_B	eaf,eaf
 	DONE
 
 	START
@@ -1775,7 +1775,7 @@ emu_op_c0:
 emu_op_c1:			; S10 T
 	;; POP	BC
 	;; Pops a word into BC
-	POPW	d4
+	POPW	ebc
 	DONE
 
 	START
@@ -1793,7 +1793,7 @@ emu_op_c3:			; S12 T36
 	;; PC <- immed.w
 	FETCHWI	d1
 	bsr	deref
-	movea.l	a0,a6
+	movea.l	a0,epc
 	DONE
 
 	START
@@ -1807,14 +1807,14 @@ emu_op_c4:
 	START
 emu_op_c5:
 	;; PUSH	BC
-	PUSHW	d4
+	PUSHW	ebc
 	DONE
 
 	START
 emu_op_c6:
 	;; ADD	A,immed.b
 	FETCHBI	d1
-	F_ADD_B	d1,d3
+	F_ADD_B	d1,eaf
 	DONE
 
 	START
@@ -1822,12 +1822,12 @@ emu_op_c7:
 	;; RST	&0
 	;;  == CALL 0
 	;; XXX check
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$00,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -1845,7 +1845,7 @@ emu_op_c9:
 	;; SP <- (SP+2)
 	POPW	d1
 	bsr	deref
-	movea.l	a0,a6
+	movea.l	a0,epc
 	DONE
 
 	START
@@ -1875,7 +1875,7 @@ emu_op_cd:
 	;;  (SP-2) <- PCl
 	;;  SP <- SP - 2
 	;;  PC <- address
-	move	a6,a0
+	move	epc,a0
 	bsr	underef		; d0 has PC
 	PUSHW	d0
 	FETCHWI	d0
@@ -1885,19 +1885,19 @@ emu_op_cd:
 emu_op_ce:
 	;; ADC	A,immed.b
 	FETCHWI	d1
-	F_ADC_B	d1,d3
+	F_ADC_B	d1,eaf
 	DONE
 
 	START
 emu_op_cf:
 	;; RST	&08
 	;;  == CALL 8
-	move	a6,a0
+	move	epc,a0
 	bsr	underef		; d0 has PC
 	PUSHW	d0
 	move.w	#$08,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -1910,7 +1910,7 @@ emu_op_d0:
 	START
 emu_op_d1:
 	;; POP	DE
-	POPW	d5
+	POPW	ede
 	DONE
 
 	START
@@ -1923,7 +1923,7 @@ emu_op_d2:
 	START
 emu_op_d3:
 	;; OUT	immed.b,A
-	move.b	d3,d1
+	move.b	eaf,d1
 	FETCHBI	d0
 	bsr	port_out
 	DONE
@@ -1938,26 +1938,26 @@ emu_op_d4:
 	START
 emu_op_d5:
 	;; PUSH	DE
-	PUSHW	d5
+	PUSHW	ede
 	DONE
 
 	START
 emu_op_d6:
 	;; SUB	A,immed.b
 	FETCHBI	d1
-	F_SUB_B	d3,d1
+	F_SUB_B	eaf,d1
 	DONE
 
 	START
 emu_op_d7:
 	;; RST	&10
 	;;  == CALL 10
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$10,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -1970,9 +1970,9 @@ emu_op_d8:
 	START
 emu_op_d9:
 	;; EXX
-	swap	d4
-	swap	d5
-	swap	d6
+	swap	ebc
+	swap	ede
+	swap	ehl
 	DONE
 
 	START
@@ -1985,7 +1985,7 @@ emu_op_da:
 	START
 emu_op_db:
 	;; IN	A,immed.b
-	move.b	d3,d1
+	move.b	eaf,d1
 	FETCHBI	d0
 	bsr	port_in
 	DONE
@@ -2005,19 +2005,19 @@ emu_op_dd:			; prefix
 emu_op_de:
 	;; SBC	A,immed.b
 	FETCHWI	d1
-	F_SBC_B	d1,d3
+	F_SBC_B	d1,eaf
 	DONE
 
 	START
 emu_op_df:
 	;; RST	&18
 	;;  == CALL 18
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$18,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -2031,7 +2031,7 @@ emu_op_e0:
 	START
 emu_op_e1:
 	;; POP	HL
-	POPW	d6
+	POPW	ehl
 	DONE
 
 	START
@@ -2046,8 +2046,8 @@ emu_op_e3:
 	;; EX	(SP),HL
 	;; Exchange
 	POPW	d1
-	PUSHW	d6
-	move.w	d1,d6
+	PUSHW	ehl
+	move.w	d1,ehl
 	DONE
 
 	START
@@ -2061,26 +2061,26 @@ emu_op_e4:
 	START
 emu_op_e5:
 	;; PUSH	HL
-	PUSHW	d6
+	PUSHW	ehl
 	DONE
 
 	START
 emu_op_e6:
 	;; AND	immed.b
 	FETCHBI	d1
-	F_AND_B	d1,d3
+	F_AND_B	d1,eaf
 	DONE
 
 	START
 emu_op_e7:
 	;; RST	&20
 	;;  == CALL 20
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$20,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -2094,9 +2094,9 @@ emu_op_e8:
 	START
 emu_op_e9:
 	;; JP	(HL)
-	FETCHB	d6,d1
+	FETCHB	ehl,d1
 	bsr	deref
-	movea.l	a0,a6
+	movea.l	a0,epc
 	DONE
 
 	START
@@ -2109,7 +2109,7 @@ emu_op_ea:
 	START
 emu_op_eb:
 	;; EX	DE,HL
-	exg.w	d5,d6
+	exg.w	ede,ehl
 	DONE
 
 	START
@@ -2129,19 +2129,19 @@ emu_op_ed:			; prefix
 emu_op_ee:
 	;; XOR	immed.b
 	FETCHBI	d1
-	F_XOR_B	d1,d3
+	F_XOR_B	d1,eaf
 	DONE
 
 	START
 emu_op_ef:
 	;; RST	&28
 	;;  == CALL 28
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$28,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -2157,8 +2157,8 @@ emu_op_f1:
 	;; POP	AF
 	;; SPEED this can be made faster ...
 	;; XXX AF
-	POPW	d3
-	move.w	d3,(flag_byte-flag_storage)(a3)
+	POPW	eaf
+	move.w	eaf,(flag_byte-flag_storage)(a3)
 	move.b	#$ff,(flag_valid-flag_storage)(a3)
 	DONE
 
@@ -2186,30 +2186,30 @@ emu_op_f4:
 emu_op_f5:
 	;; PUSH	AF
 	bsr	flags_normalize
-	LOHI	d3
-	move.b	flag_byte(pc),d3
+	LOHI	eaf
+	move.b	flag_byte(pc),eaf
 	;; XXX wrong
-	HILO	d3
-	PUSHW	d3
+	HILO	eaf
+	PUSHW	eaf
 	DONE
 
 	START
 emu_op_f6:
 	;; OR	immed.b
 	FETCHBI	d1
-	F_OR_B	d1,d3
+	F_OR_B	d1,eaf
 	DONE
 
 	START
 emu_op_f7:
 	;; RST	&30
 	;;  == CALL 30
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$08,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE
 
 	START
@@ -2224,9 +2224,9 @@ emu_op_f8:
 emu_op_f9:
 	;; LD	SP,HL
 	;; SP <- HL
-	move.w	d6,d1
+	move.w	ehl,d1
 	bsr	deref
-	movea.l	a0,a4
+	movea.l	a0,esp
 	DONE
 
 	START
@@ -2259,17 +2259,17 @@ emu_op_fd:			; prefix
 emu_op_fe:
 	;; CP	immed.b
 	FETCHBI	d1
-	F_CP_B	d1,d3
+	F_CP_B	d1,eaf
 	DONE
 
 	START
 emu_op_ff:
 	;; RST	&38
 	;;  == CALL 38
-	move	a6,a0
+	move	epc,a0
 	bsr	underef
 	PUSHW	d0
 	move.w	#$08,d0
 	bsr	deref
-	move	a0,a6
+	move	a0,epc
 	DONE